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Analog-to-digital converter (ADC)
RM0008
11.3.8
11.3.9
Scan mode
This mode is used to scan a group of analog channels.
Scan mode can be selected by setting the SCAN bit in the ADC_CR1 register. Once this bit
is set, ADC scans all the channels selected in the ADC_SQRx registers (for regular
channels) or in the ADC_JSQR (for injected channels). A single conversion is performed for
each channel of the group. After each end of conversion the next channel of the group is
converted automatically. If the CONT bit is set, conversion does not stop at the last selected
group channel but continues again from the first selected group channel.
If the DMA bit is set, the direct memory access controller is used to transfer the converted
data of regular group channels to SRAM after each EOC.
The injected channel converted data is always stored in the ADC_JDRx registers.
Injected channel management
Triggered injection
To use triggered injection, the JAUTO bit must be cleared and SCAN bit must be set in the
ADC_CR1 register.
1.
2.
3.
Start conversion of a group of regular channels either by external trigger or by setting
the ADON bit in the ADC_CR2 register.
If an external injected trigger occurs during the regular group channel conversion, the
current conversion is reset and the injected channel sequence is converted in Scan
once mode.
Then, the regular group channel conversion is resumed from the last interrupted
regular conversion. If a regular event occurs during an injected conversion, it doesn’t
interrupt it but the regular sequence is executed at the end of the injected sequence.
Figure 28 shows the timing diagram.
Note:
Note:
204/995
When using triggered injection, one must ensure that the interval between trigger events is
longer than the injection sequence. For instance, if the sequence length is 28 ADC clock
cycles (that is two conversions with a 1.5 clock-period sampling time), the minimum interval
between triggers must be 29 ADC clock cycles.
Auto-injection
If the JAUTO bit is set, then the injected group channels are automatically converted after
the regular group channels. This can be used to convert a sequence of up to 20 conversions
programmed in the ADC_SQRx and ADC_JSQR registers.
In this mode, external trigger on injected channels must be disabled.
If the CONT bit is also set in addition to the JAUTO bit, regular channels followed by injected
channels are continuously converted.
For ADC clock prescalers ranging from 4 to 8, a delay of 1 ADC clock period is automatically
inserted when switching from regular to injected sequence (respectively injected to regular).
When the ADC clock prescaler is set to 2, the delay is 2 ADC clock periods.
It is not possible to use both auto-injected and discontinuous modes simultaneously.
Doc ID 13902 Rev 9
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